Nonvolatile semiconductor memory elements are useful in that they allow the storage of information in an unpowered state. Such nonvolatile memory elements incorporating ferroelectric materials represent an advance over other types of nonvolatile memory elements such as electrically erasable and programmable read only memories (EEPROMs) in terms of data transfer rate, fatigue, radiation hardness, lower programming voltage, smaller cell size, and other characteristics. In a nonvolatile semiconductor memory element comprising a ferroelectric material with an electrically switchable polarization state, the write and read times are both potentially fast and substantially the same in principle for most configurations; and the polarization state is maintained even if the electrical power is removed, making this nonvolatile memory ideal for many applications.
Many different types of ferroelectric memory elements are represented in the prior art. These ferroelectric memory elements may be further classed as destructive readout devices and non-destructive readout devices.
U.S. Pat. Nos. 5,099,305 and 5,229,309 disclose destructive readout nonvolatile memory elements incorporating a capacitor having a ferroelectric dielectric material between two conductor layers. This ferroelectric capacitor is electrically connected to the source or drain of a transistor. The polarization of the ferroelectric material is utilized to indicate one of two possible logic states for the data stored in the memory element. To write data into the ferroelectric capacitor memory element, the ferroelectric dielectric film is polarized in a positive or a negative state by the application of a positive or negative electric field across the capacitor. To read the stored data from the ferroelectric capacitor memory element, a read voltage must be applied to the capacitor to determine the polarization state. If the read voltage is the opposite polarity from the original write voltage, a substantial charge flow results from the polarization reversal in the capacitor. If the read voltage has the same polarity as the original write voltage, the polarization of the capacitor is not reversed, and little if any charge flow occurs. The different in the charge flow response (i.e. current) of the capacitor during readout indicates the logic state of the stored data.
After a read, the original data is restored in the capacitor. In the first case above (the read voltage having the opposite polarity of the original write voltage) the polarization must be inverted twice (i.e. switched from one polarization state to the opposite polarization state). The first polarization inversion is required to determine the stored logic state (i.e. to read out the data), and the second polarization inversion is required to re-establish (i.e. re-write) the data to be stored in the memory element. For the second case (the read voltage having the same polarity of the original write voltage), no polarization inversion is required to determine the stored logic state.
The logic state of the stored data in a given capacitor determines whether or not the polarization must be inverted for a read, and the stored bits could remain the same or switch continually for each read. This continual inversion of the ferroelectric polarization is a disadvantage of this type of memory element since it fatigues the ferroelectric film which fails to function normally after it has undergone inversion of polarization some number of times depending on the particular technology. In addition, the stored information is vulnerable to loss by a power failure or other effect during the time between the first inversion of the ferroelectric polarization to read out the stored information and the second inversion of the polarization to re-establish the data storage in the memory element.
The above disadvantages of destructive readout nonvolatile memory elements may be overcome by the development of non-destructive readout nonvolatile memory elements that do not change the polarization state of the ferroelectric material during a read. Such non-destructive read nonvolatile memory elements may be based on transistors, resistors, or diodes using a stored electric charge or polarization to indicate a memory state.
U.S. Pat. No. 5,198,994 discloses a non-destructive readout nonvolatile semiconductor memory element comprising a field-effect transistor (FET) having a ferroelectric gate dielectric film. The polarization state of the ferroelectric material affects the threshold voltage of the FET and thereby indicates the stored data. The ferroelectric material does not need to be polled to sense the state of the stored data. However, a voltage does need to be applied across the source-drain of the FET (and a voltage to the FET gate) to read the data; and this voltage must be sufficiently small to not disturb the ferroelectric polarization state.
U.S. Pat. No. 5,070,385 discloses a non-destructive readout ferroelectric nonvolatile variable resistor memory element in which the resistance of a semiconductor layer is controlled by the degree of polarization of an overlying ferroelectric layer. The resistance of this resistor element may be changed in a continuous manner resulting in a large number of possible resistance states as may be required for the development and programming of neuro-networks. To read the resistance state of this memory element, a voltage must be applied across the resistor; and this voltage must be sufficiently small to not disturb the ferroelectric polarization state.
U.S. Pat. No. 2,791,758 discloses a non-destructive readout semiconductor switch that is essentially a linear resistance having two stable states of operation, one offering a relatively high impedance and the other a relatively low impedance, with the resistance state controlled and determined by an overlying ferroelectric material. This semiconductor switch incorporates a semiconductor diode operated in a reverse-bias mode to restrict the current conduction path to an isolated surface region proximate to the ferroelectric material.
A disadvantage of the prior art memory element of U.S. Pat. No. 2,791,758 is that it is not in an integrated form; and the ferroelectric material is not deposited as a thin film on a surface of the memory element. Instead, this prior art memory element is fabricated in a hybrid form, with the ferroelectric material in wafer form (preferably a single crystal) positioned as close as possible to the semiconductor surface. Even with substantial precautions, this prior art memory element suffers from air gaps at the semiconductor-ferroelectric interface. In such case, the major portion of any applied voltage will occur across this gap rather than across the high-dielectric-constant ferroelectric material, and there is a likelihood of an electrical breakdown at this interface. To prevent such an electrical breakdown, a flowable dielectric filler material is used to fill the air gaps between the ferroelectric wafer and the semiconductor surface. This prior art bistable device as disclosed makes no provision for isolating the memory element on a semiconductor substrate (as, for example, by using a patterned insulating layer), and no means are disclosed for incorporating a plurality of memory elements of this design on a semiconductor substrate in the form of an IC.
U.S. Pat. No. 2,791,759 discloses a non-destructive readout semiconductor diode memory element with a ferroelectric material in the form of a thin wafer, preferably a single crystal (i.e. monocrystalline), positioned close to a semiconductor surface and acting to control the conductivity type of the closely adjacent portion of the semiconductor. In one state of polarization of the ferroelectric material, the conductivity type of the adjacent portion of the semiconductor is such that a reverse-biased rectifying junction is formed resulting in a high impedance in the semiconductor; while, in another state of polarization, the conductivity type of the adjacent portion of the semiconductor is such that there is no appreciable rectifying junction resulting in a low impedance in the semiconductor.
U.S. Pat. No. 2,791,759 also has the disadvantages that it is not in an integrated form and that the ferroelectric material is not deposited as a thin film on a surface of the memory element (i.e. the ferroelectric material is not in intimate contact with the semiconductor surface). Instead, this prior art memory element is fabricated in a hybrid form, with the ferroelectric material wafer positioned as close as possible to the semiconductor surface. The unavoidable air gaps at the ferroelectric-semiconductor interface in this prior art memory element results in the preferable use of a ferroelectric material having a low dielectric constant (and a low remanent polarization) to minimize the possibility of dropping most of any applied voltage across the air gap and deleteriously affecting the memory performance of the ferroelectric element. This prior art bistable device as disclosed makes no provision for isolating the memory element on a semiconductor substrate (as, for example, by using a patterned insulating layer). And, this lack of isolation results in regions of the semiconductor p-n junction (where the electrodes make contact to the diffused layer) that are not subject to control by the electrical field produced by the ferroelectric material. In addition, the lack of isolation prevents the formation of an array of memory elements on a semiconductor substrate as in an IC.
U.S. Pat. No. 2,791,761 discloses another non-destructive readout semiconductor diode memory element in which a ferroelectric material (preferably a crystal having a low dielectric constant) is mounted against a surface of the semiconductor in the rectifying barrier region (i.e. with the electric field direction of the ferroelectric material parallel to the semiconductor p-n junction). In this manner, the polarization state of the ferroelectric material is used to alter the reverse conductivity characteristics of the rectifying p-n junction.
U.S. Pat. No. 2,791,761 suffers from many of the same disadvantages as U.S. Pat. Nos. 2,791,758 and 2,791,759. In order to mount the ferroelectric material as close to the semiconductor surface as possible in this design, considerable time, effort, and expense are required to produce smooth mating surfaces on the ferroelectric and semiconductor by grinding, polishing, or cleaving techniques. In addition it is desirable to interpose a dielectric material such as a wax or liquid having a high dielectric constant between the ferroelectric and semiconductor for improved performance and to prevent an electrical breakdown since the ferroelectric programming voltage for an inversion of the polarization of the ferroelectric material may vary from less than 200 volts to as large as 500 volts. This prior art device is not disclosed as being capable of being for med as an isolated device on a substrate; and there is no teaching of the possibility of depositing the ferroelectric material as a thin film on a surface of the memory element In addition, this prior art memory element as disclosed is incapable of being incorporated into an IC as is desirable for the formation of an array of memo or elements; and the required ferroelectric programming voltage is far in excess of the about 5 volts preferred for ICs.